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A Novel Architecture for Scalable Quantum Computing

Researchers at the UChicago Pritzker School of Molecular Engineering (UChicago PME) have developed an innovative design for a superconducting quantum processor, laying the groundwork for a potential architecture to support the large-scale, robust devices required for the quantum revolution.

Researchers in Cleland Lab at the University of Chicago Pritzker School of Molecular Engineering, including (from left) alumnus Haoxiong Yan, PhD candidate Xuntao Wu, and Prof. Andrew Cleland, have realized a new design for a superconducting quantum processor.

Researchers in Cleland Lab at the University of Chicago Pritzker School of Molecular Engineering, including (from left) alumnus Haoxiong Yan, PhD candidate Xuntao Wu, and Prof. Andrew Cleland, have realized a new design for a superconducting quantum processor. Image Credit: John Zich

Unlike traditional quantum chip designs that arrange qubits in a 2D grid, the Cleland Lab team has developed a modular quantum processor featuring a reconfigurable router as a central hub. This design allows any two qubits to connect and entangle, whereas earlier systems limited interactions to neighboring qubits.

A quantum computer won’t necessarily compete with a classical computer in things like memory size or CPU size. Instead, they take advantage of a fundamentally different scaling: Doubling a classical computer’s computational power requires twice as big a CPU or twice the clock speed. Doubling a quantum computer only requires one additional qubit.

Andrew Cleland, Professor, Pritzker School of Molecular Engineering, University of Chicago

Taking inspiration from classical computers, the design groups qubits around a central router, akin to how PCs communicate through a network hub. Quantum “switches” enable connections and disconnections between qubits within nanoseconds, facilitating high-fidelity quantum gates and generating quantum entanglement, a key resource for quantum computing and communication.

In principle, there is no limit to the number of qubits that can connect via the routers. You can connect more qubits if you want more processing power, as long as they fit in a certain footprint.

Xuntao Wu, PhD Candidate, Pritzker School of Molecular Engineering, University of Chicago

Wu is the lead author of the study that details this novel method of connecting superconducting qubits. The new quantum chip is flexible, scalable, and as modular as the chips used in cellphones and laptops.

Wu added, “Imagine you have a classical computer that has a motherboard integrating lots of different components, like your CPU or GPU, memory, and other elements. Part of our goal is to transfer this concept to the quantum realm.

Size and Noise

Quantum computers are highly advanced but delicate devices with the potential to revolutionize fields such as telecommunications, healthcare, clean energy, and cryptography. However, two critical advancements are needed for them to reach their full potential in addressing global challenges.

First, they must be scaled to a sufficiently large size with flexible operability.

Cleland added, “This scaling can offer solutions to computational problems that a classical computer simply cannot hope to solve, like factoring huge numbers and thereby cracking encryption codes.

Second, they must achieve fault tolerance, enabling them to perform massive calculations with minimal errors and ideally surpass the processing power of today’s most advanced classical computers. The superconducting qubit platform being developed is one promising approach to realizing this goal.

A typical superconducting processor chip is a square shape with all the quantum bits fabricated on that. It’s a solid-state system on a planar structure. If you can imagine a 2-D array, like a square lattice, that is the topology of typical superconducting quantum processors.

Haoxiong Yan, Study Co-Author and Quantum Engineer, Applied Materials

Limitations in Typical Design

This conventional design introduces several limitations.

First, arranging qubits in a grid restricts each qubit to interacting with a maximum of four neighbors—those directly to the north, south, east, and west. Greater qubit connectivity typically enhances a processor's flexibility and efficiency, but the four-neighbor constraint is inherent to the planar design. Consequently, scaling such devices for practical quantum computing applications would likely require unrealistic resource levels, making brute-force expansion impractical.

Doubling a classical computer’s computational power requires twice as big a CPU ... Doubling a quantum computer only requires one additional qubit.

UChicago Pritzker School of Molecular Engineering Prof. Andrew Cleland

Second, the nearest-neighbor connections restrict the types of quantum dynamics that can be implemented and limit the degree of parallelism the processor can achieve.

Finally, fabricating all qubits on the same planar substrate creates significant challenges for fabrication yield. Even a small number of defective qubits can render the entire processor inoperable.

To undertake practical quantum computing, we need millions or even billions of qubits and we need to make everything perfectly,” Yan stated.

Rethinking the Chip

To address these challenges, the team redesigned the quantum processor to adopt a modular architecture, allowing different components to be pre-selected and integrated onto the processor motherboard.

Next, the team aims to scale up the quantum processor to accommodate more qubits, develop novel protocols to enhance its capabilities and explore methods for linking router-connected qubit clusters, similar to how supercomputers connect their component processors.

Additionally, they plan to extend the distance over which qubits can be entangled.

Wu stated, “Right now, the coupling range is sort of medium-range, on the order of millimeters. So, if we are trying to think of ways to connect remote qubits, then we must explore new ways to integrate other kinds of technologies with our current setup.

Journal Reference:

Wu, X. et. al. (2024) A Novel Architecture for Scalable Quantum Computing. Physical Review X. doi.org/10.1103/PhysRevX.14.041030

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